Digital Logic & Design
Course: BT11207 — Digital Logic and Design
Institute: IIIT Pune — F.Y. B.Tech Semester II (Even Sem AY 2024-25)
Reference Books: M. Morris Mano — Digital Design; C.H. Roth — Fundamentals of Logic Design; R.P. Jain — Modern Digital Electronics
This page organizes Unit-wise comprehensive notes covering the DLD syllabus. Each unit has detailed explanations, worked examples, and extensive practice questions. An additional LEEE preparation section covers IIIT Hyderabad lateral entry exam material.
Unit-wise Notes
Unit I — Number System & Boolean Algebra
Number Systems & Conversions; Binary Weighted Codes (BCD, 2421, Excess-3, Gray Code); Signed Numbers — 1’s & 2’s Complement; Binary Arithmetic (Addition, Subtraction, Multiplication, Division); Boolean Algebra & Logic Gates; Boolean Laws & Theorems; Canonical Forms — SOP & POS; Karnaugh Maps (K-Maps). Includes glossary of key terms, worked examples, and practice questions.
Unit II — Combinational Circuits
Introduction to Combinational Logic; Code Converters (Binary ↔ Gray); Binary Comparators; Half & Full Adders; Half & Full Subtractors; Serial & Parallel Adders, BCD Adder; Multiplexers (MUX); Demultiplexers (DEMUX); Encoders; Decoders. Includes worked examples and practice questions.
IIIT Hyderabad LEEE Preparation
About the LEEE Exam; DLD Syllabus & Weightage; Key Differences — Semester Exam vs LEEE; LEEE-Style MCQs for Unit I Topics; LEEE-Style MCQs for Unit II Topics; Exam Strategy & Tips.